VHSIC Hardware Description Language (VHDL) tutorial Author : Peter J. Ashenden

he purpose of this tutorial is to describe the modeling language VHDL. VHDL in-
cludes facilities for describing logical structure and function of digital systems at a
number of levels of abstraction, from system level down to the gate level. It is intend-
ed, among other things, as a modeling language for specification and simulation. We
can also use it for hardware synthesis if we restrict ourselves to a subset that can be
automatically translated into hardware.
VHDL arose out of the United States government’s Very High Speed Integrated
Circuits (VHSIC) program. In the course of this program, it became clear that there
was a need for a standard language for describing the structure and function of inte-
grated circuits (ICs). Hence the VHSIC Hardware Description Language (VHDL) was
developed. It was subsequently developed further under the auspices of the Institute
of Electrical and Electronic Engineers (IEEE) and adopted in the form of the IEEE Stan-
dard 1076, Standard VHDL Language Reference Manual, in 1987. This first standard
version of the language is often referred to as VHDL-87.
Like all IEEE standards, the VHDL standard is subject to review at least every five
years. Comments and suggestions from users of the 1987 standard were analyzed by
the IEEE working group responsible for VHDL, and in 1992 a revised version of the
standard was proposed. This was eventually adopted in 1993, giving us VHDL-93. A
further round of revision of the standard was started in 1998. That process was com-
pleted in 2001, giving us the current version of the language, VHDL-2002.
This tutorial describes language features that are common to all versions of the
language. They are expressed using the syntax of VHDL-93 and subsequent versions.
There are some aspects of syntax that are incompatible with the original VHDL-87 ver-
sion. However, most tools now support at least VHDL-93, so syntactic differences
should not cause problems.
The tutorial does not comprehensively cover the language. Instead, it introduces
the basic language features that are needed to get started in modeling relatively simple
digital systems. For a full coverage, the reader is referred to The Designer’s Guide to
VHDL, 2nd Edition, by Peter J. Ashenden, published by Morgan Kaufman Publishers
(ISBN 1-55860-674-2).